Computers are everywhere in today's society. They come in all different varieties and can be found in places such as automobiles, laptops or home personal computers, banks, personal digital assistants, cell phones, and servers. In addition, as computers become more commonplace and software becomes more complex, there is a need for the computing devices to process more data at faster speeds using a smaller package and less power. As such, the area of a printed circuit board (PCB) of a computing system utilized by the components and portions of the computing system becomes a highly valuable commodity. In general, the less area of the PCB a computing system circuit uses, the smaller the computer system package may be. Alternatively, area not utilized by a computer system circuit may be used to enhance the circuit's performance through additional components of the circuit.
However, placing components or conductors of the PCB near each other may result in negative consequences in the performance of the circuit. For example, vias (or “via barrels”) within the PCB provide electrical connections between layers of the PCB to carry signals or power between the layers. As such, high frequency signals may be carried along the vias through the PCB from one layer to another. However, a signal transmitted along a via may capacitively couple with another via that is located nearby. This capacitive coupling appears as noise in the signals being transmitted along the vias. Some coupling between vias in the PCB may affect the performance of the circuit such that errors in the computing system occur.
One method to reduce the capacitive coupling in the PCB is to space apart the components (such as the vias) along the PCB. In general, the distance between the vias is inversely related to the amount of capacitive coupling observed in the related signal. However, spacing apart the vias of the PCB consumes PCB area such that circuit and PCB designers typically must weigh the cost of consumed board area to the capacitive coupling of the circuit layout. It is with these and other issues in mind that various aspects of the present disclosure were developed.